![Quantitative Analysis of Control Flow Checking Mechanisms for Soft Errors Aviral Shrivastava, Abhishek Rhisheekesan, Reiley Jeyapaul, and Carole-Jean Wu. - ppt download Quantitative Analysis of Control Flow Checking Mechanisms for Soft Errors Aviral Shrivastava, Abhishek Rhisheekesan, Reiley Jeyapaul, and Carole-Jean Wu. - ppt download](https://images.slideplayer.com/11/3338760/slides/slide_3.jpg)
Quantitative Analysis of Control Flow Checking Mechanisms for Soft Errors Aviral Shrivastava, Abhishek Rhisheekesan, Reiley Jeyapaul, and Carole-Jean Wu. - ppt download
![The Yamazaki-Teiichi Prize | The 15th (2015) Yamazaki-Teiichi Prize Winner Semiconductor & Semiconductor Device The Yamazaki-Teiichi Prize | The 15th (2015) Yamazaki-Teiichi Prize Winner Semiconductor & Semiconductor Device](https://www.mst.or.jp/portals/0/prize/common/img/winners/handoutai_2015_4en.gif)
The Yamazaki-Teiichi Prize | The 15th (2015) Yamazaki-Teiichi Prize Winner Semiconductor & Semiconductor Device
![International standards adopted by ITU-T to address soft errors affecting telecommunication equipment - Enhancing reliability based on Recommendations for design, testing, and quality estimation of measures designed to mitigate soft errors caused International standards adopted by ITU-T to address soft errors affecting telecommunication equipment - Enhancing reliability based on Recommendations for design, testing, and quality estimation of measures designed to mitigate soft errors caused](https://group.ntt/en/newsrelease/2018/11/22/img/1811222aa.gif)
International standards adopted by ITU-T to address soft errors affecting telecommunication equipment - Enhancing reliability based on Recommendations for design, testing, and quality estimation of measures designed to mitigate soft errors caused
![Figure 1 from Soft error tolerant latch designs with low power consumption (invited paper) | Semantic Scholar Figure 1 from Soft error tolerant latch designs with low power consumption (invited paper) | Semantic Scholar](https://d3i71xaburhd42.cloudfront.net/80392cbb14a8a280a0b3a3fe40fdabc4920b70b7/2-Figure1-1.png)
Figure 1 from Soft error tolerant latch designs with low power consumption (invited paper) | Semantic Scholar
![Latest Research Results and ITU-T Standardization Activities on Soft Errors Caused by Cosmic Rays | NTT Technical Review Latest Research Results and ITU-T Standardization Activities on Soft Errors Caused by Cosmic Rays | NTT Technical Review](https://www.ntt-review.jp/archive_html/202205/images/gls_fig01.jpg)
Latest Research Results and ITU-T Standardization Activities on Soft Errors Caused by Cosmic Rays | NTT Technical Review
![Figure 1 from Impact of Scaling on Neutron-Induced Soft Error in SRAMs From a 250 nm to a 22 nm Design Rule | Semantic Scholar Figure 1 from Impact of Scaling on Neutron-Induced Soft Error in SRAMs From a 250 nm to a 22 nm Design Rule | Semantic Scholar](https://d3i71xaburhd42.cloudfront.net/401ca8016df782ea1865680bbd44ce521e9ac347/2-Figure1-1.png)
Figure 1 from Impact of Scaling on Neutron-Induced Soft Error in SRAMs From a 250 nm to a 22 nm Design Rule | Semantic Scholar
![Neutron-energy-dependent Semiconductor Soft Errors Successfully Measured for the First Time | NTT Technical Review Neutron-energy-dependent Semiconductor Soft Errors Successfully Measured for the First Time | NTT Technical Review](https://www.ntt-review.jp/archive_html/202106/images/ra1_fig01.jpg)